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NCP5911
VCC
PWM
Logic
BST
DRVH
EN
Anti ? Cross
Conduction
ZCD
V C C
SW
DRVL
Detection
UVLO
Fault
Figure 1. Block Diagram
PIN DESCRIPTIONS
Pin No.
1
2
3
4
5
6
7
8
9
Symbol
BST
PWM
EN
VCC
DRVL
GND
SW
DRVH
FLAG
Description
Floating bootstrap supply pin for high side gate driver. Connect the bootstrap capacitor between this pin and
the SW pin.
Control input. The PWM signal has three distinctive states: Low = Low Side FET Enabled, Mid = Diode
Emulation Enabled, High = High Side FET Enabled.
Logic input. A logic high to enable the part and a logic low to disable the part. Three states logic input:
EN = High to enable the gate driver;
EN = Low to disable the driver;
EN = Mid to go into diode mode (both high and low side gate drive signals are low)
Power supply input. Connect a bypass capacitor (0.1 m F) from this pin to ground.
Low side gate drive output. Connect to the gate of low side MOSFET.
Bias and reference ground. All signals are referenced to this node.
Switch node. Connect this pin to the source of the high side MOSFET and drain of the low side MOSFET.
High side gate drive output. Connect to the gate of high side MOSFET.
Thermal flag. There is no electrical connection to the IC. Connect to ground plane.
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